I believe it's the `lock xadd` instruction. It's faster when combined with x86 T... | Hacker News

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		wvenable 19 days ago \| parent \| context \| favorite \| on: AMD claims Arm ISA doesn't offer efficiency advant... I believe it's the `lock xadd` instruction. It's faster when combined with x86 Total Store Ordering mode that the Rosetta emulation runs under.

saagarjha 19 days ago [–]

Looking at objc_retain apparently it's a lock cmpxchg these days

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