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You're right, I was thinking about the interrupt precision over the default APIC timer.

My point about it being disabled on some platforms has historically been true, however.



I think you're confusing this and the kernel's blacklisting of the TSC for timekeeping if it is not synchronized across CPUs; but while there's a knob to block userspace's access to the TSC, I am not sure that has been used anywhere except for debugging reasons (e.g. record/replay).




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