I explicitely do disable register ABI alias names, pseudo-instructions and transparent "optimizations", because I run the RISC-V binary in my own x86_64 assembly written little RISC-V machine code interpreter which does support only the core instructions (and a linux syscall translation layer). I may start to add the compressed instructions someday though.
If you are writing assembly you probably are using compressed instructions already since your assembler can do the substitions transparently, e.g.
Example: https://godbolt.org/z/MG3v3jx7P (the disassembly shows addi but the instruction is only two bytes).They offer a nice reduction in code size with basically no downsides :)