I/Q demodulation is a common and useful RF signal processing technique used in charged-particle accelerators. When implemented with conventional analog RF components, a number of inherent errors can degrade the I/Q Demodulator performance, including gain balance, quadrature-phase balance, DC offsets, impedance match, and carrier leakage. Recent advances in high-speed analog-to-digital (ADC) converters allow the I/Q demodulator to be implemented digitally, greatly reducing these systematic errors. This paper describes the design of a digital I/Q demodulator that will be applied to the PEP-II B factory.
I/Q demodulation is a common and useful RF signal processing technique used in charged-particle accelerators. When implemented with conventional analog RF components, a number of inherent errors can degrade the I/Q Demodulator performance, including gain balance, quadrature-phase balance, DC offsets, impedance match, and carrier leakage. Recent advances in high-speed analog-to-digital (ADC) converters allow the I/Q demodulator to be implemented digitally, greatly reducing these systematic errors. This paper describes the design of a digital I/Q demodulator that will be applied to the PEP-II B factory.