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It sounds like it has similar (maybe the same) extensions as the Hitachi 6309 https://en.wikipedia.org/wiki/Hitachi_6309

That is, it has a 32-bit accumulator (made up of four 8-bit accumulators) but apparently no address extensions.




Wow I didn't know Hitachi made anything outside of their superh/sh CPUs (which also do a mixed encoding scheme) I'm guessing they derived it from these guys and appeased the risc crowds. Off topic but I wonder what ever happened to that j-core project. I have a feeling understanding/learning both the turbo9/6809 along with the j2/sh2 would make for a great comparison.




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