In theory an FPGA would be capable of running a customized TTA processor for your ASIP workloads and perform better than conventional processors, but in practice you will run into two problems.
Frameworks like OpenASIP are really inconvenient. There is no easy way to take a single C function and turn it into a function unit using high level synthesis. You will have to mess around with a lot of GUI shenanigans before you can test out your design and then you will have to manually call the function unit using a macro.
The other problem is that the performance edge of a TTA vs an in-order processor is no more than 10x and in practice less than 5x. This means that an ASIP running on an FPGA will struggle to compete with a regular processor in terms of cost. Yes it won't be as fast, but you know what? It probably runs at a higher frequency to begin with. Something like 1 GHz or more.
This means that the FPGA's primary benefit is in reducing power consumption versus regular processors, but since the designer of the SoC already has phone specific workloads in mind, they can implement whatever ASIP processor directly in silicon.
In a parallel universe there are some people doing crazy things with FPGAs such as automatically generating a bunch of TTAs and using the ability to reconfigure the FPGA to not only load the program, but also the associated optimized TTA for the program right before execution to take full advantage of the FPGA.
FPGAs are terrible for anything except for prototyping, and they can largely only do things that are in the digital domain (outside of specific blocks designed for interface purposes). For a giant company like Apple they're much better serviced by an ASIC which can do the same thing at 1/100th the price and signficantly less size. The only reason to use an FPGA is if you don't know what you're doing and need the flexibility.
The other reasons are: power, power, power. FPGAs use orders of magnitude more power to accomplish the same task as an ASIC since you're doing lookups of bits in SRAM tables instead of directly implementing the logic functions using transistors. This is great while prototyping, but less useful in a mass produced device where virtually all functions are fixed at time of product release.
Frameworks like OpenASIP are really inconvenient. There is no easy way to take a single C function and turn it into a function unit using high level synthesis. You will have to mess around with a lot of GUI shenanigans before you can test out your design and then you will have to manually call the function unit using a macro.
The other problem is that the performance edge of a TTA vs an in-order processor is no more than 10x and in practice less than 5x. This means that an ASIP running on an FPGA will struggle to compete with a regular processor in terms of cost. Yes it won't be as fast, but you know what? It probably runs at a higher frequency to begin with. Something like 1 GHz or more.
This means that the FPGA's primary benefit is in reducing power consumption versus regular processors, but since the designer of the SoC already has phone specific workloads in mind, they can implement whatever ASIP processor directly in silicon.
In a parallel universe there are some people doing crazy things with FPGAs such as automatically generating a bunch of TTAs and using the ability to reconfigure the FPGA to not only load the program, but also the associated optimized TTA for the program right before execution to take full advantage of the FPGA.
For those who are interested in TTas here is a start: https://en.m.wikipedia.org/wiki/Transport_triggered_architec...