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RISC-V assembly patch for FFmpeg by SiFive (ffmpeg.org)
4 points by nixcraft on May 20, 2023 | hide | past | favorite | 5 comments


Why did they use `vslidedown v1, v2, 1` instead of `vslide1down v1, v2, x0`?


Heh. The use of `vslidedown` was also what drew my eyes. But in my case the thoughts were "that's supposed to be a pretty slow instruction, included mostly for debuggers to use".

I wonder if they've run it on any actual RVV 1.0 hardware. I guess probably in an FPGA.

Tempted to convert that to RVV 0.7.1 and submit it...


> Tempted to convert that to RVV 0.7.1 and submit it

Have you seen https://arxiv.org/abs/2304.10324 yet?

Here is their script: https://github.com/RISCVtestbed/rvv-rollback


Yup, I've seen that, and I've been in communication with Joseph and Maurice about one or two things recently.


My thought was that `vslidedown` with an immediate 1 technically does less work than slide1down, and maybe they special cases that one in hardware, but that seems quite unlikely.

Edit: actually idk if there is a version of `vslidedown` that is allowed to set the values to an undefined state.




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