See my comment elsewhere[0] for the status of Tofino, but in terms of what's next: this silicon is going to hold us for quite a while -- but whatever's next will continue to be P4 based, in which we remain ardent believers.
Cisco's SiliconOne is programmable using P4 as well. I'd be curious to know if it'd work for your use cases. It certainly isn't going anywhere since we're using it in darn near all our products now.
I assume that since you're using P4, you can likely pivot to Mount Evans chips (or the successors in that line) and a dumber switch if you need to, and the fact that Google is buying them too gives the product some legs from Intel's perspective. I really like Intel's networking products, but they have an unfortunate habit of getting canceled.
I will disclaim that I have no idea how Oxide is using P4 for packet processing, but what you are currently doing with P4 on your switch can likely be moved to some rules on a dumber switch/router (eg what hyperscalers use) plus a special packet encapsulation on the NIC using similar P4 rules. That lets you push the intelligence out of the switch and toward the edge of the network. At least, this is the approach that the major hyperscalers are taking, and there doesn't seem to be a good reason to not do this (other than potentially the cost, since you don't have the scale to get a good discount on the NICs).
Yeah, definitely not a switch ASIC. But would love to see something like the E2000 with 1) an open underlying ISA to enable truly open P4 compilers and 2) no compute complex so we can focus the power budget on the programmable data plane.
