Either port to a processor you have or build a RISC-V core yourself, say, with an FPGA. There is an abundance of designs you can use, but actually making a simple core that can support this isn't hard if you aren't too ambitious with the performance.
(I know of at least one RISC-V core implemented with 74-series TTL chips and a vacuum-tube implementation is surely in the works somewhere).
(I know of at least one RISC-V core implemented with 74-series TTL chips and a vacuum-tube implementation is surely in the works somewhere).