Ha - no. Absolutely not. I don't know where this total myth came from that RISC-V is open source therefore implementations will be better.
RISC-V is just an ISA (Instruction Set) that anyone can use, but what people use it in, and how they use it, is not specified and does not have to be open source. Apple could take RISC-V, plop it in their iPhone, and release it tomorrow in a processor that only boots Apple-signed code and requires proprietary firmware without any issue whatsoever. Intel could literally release a Core i5 with a RISC-V instruction set and an Intel ME built-in, no problem.
Where the hope mainly comes from is small chip developers like SiFive, who make many of their drivers and such open-source. But that's only if you buy from vendors like them - if you implement your own RISC-V core, there's no requirement that the drivers or firmware be open-source for it, in any way. You might say that's a missed opportunity. I say RISC-V wouldn't have caught on otherwise.
> I don't know where this total myth came from that RISC-V is open source therefore implementations will be better.
The hope is that (unlike x86/ARM) you will be able to purchase core designs from people who aren't sockpuppets. RISC-V will at least let people choose between which backdoor they want installed, which is an upgrade from a status quo of "All Your TCP Traffic Belongs To U.S.".
It's not exactly Superman, descending from the skies to deliver us from dystopia. But it's certainly a better path than letting ARM dominate any more of our chip landscape.
> Where the hope mainly comes from is small chip developers like SiFive, who make many of their drivers and such open-source. But that's only if you buy from vendors like them ...
So, you're saying it is possible (or will be down the track...) as long as things are bought from SiFive or a similar OSS-friendly place.
That's still a large improvement over the current situation, even if other vendors take different, locked down approach.
> Where the hope mainly comes from is small chip developers like SiFive, who make many of their drivers and such open-source.
But there are still roadblocks as they likely bought the memory controller from a 3rd party as an IP block they drop into their chip. This means the bring up procedure for the memory controller is proprietary and delivered in blob form to be loaded into the black box ip. Likely the same for other 3rd party ip blocks as developing this stuff from scratch is very difficult and time consuming. Especially for critical hardware like memory controllers. This makes opening the platforms firmware just as tricky as any other chip from $bigvendor. This makes full top to bottom security audits difficult or impossible.
Next year all x86_64 patents will expire. From then on everybody can make a IME/PSP/Pluton-free x86_64 chip. This makes RISC V completely obsolete since the x86 ecosystem is obviously much more mature.
> This makes RISC V completely obsolete since the x86 ecosystem is obviously much more mature.
While I'd really love to agree with you, the IPC of a RISC-V chip can annihilate an x86 machine on equivalently advanced manufacturing node. It's performance-per-watt can reach up to 10x efficiency over x86 in the right situations, and pretty much all of the cool stuff we like in x86 can be added as an ISA extension.
If we're headed to a RISC/low-power computing future, RISC-V will be the future people's champion. x86 will be a legacy compatibility mode that we use for games and "retrocomputing", likely.
X86 may be mature but I think the M1 has shown that there is plenty of potential for improvement. I know M1 is ARM instead of RISCV, but there may yet be ways to get better chips.
That said, the hardware we have is really good, it's just the software side that is a complete garbage heap.
Apple Silicon was an interesting move when you look at it from a numbers perspective. The M1 is a really impressive chip, but AMD had competitive x86 hardware that was out on the 7nm node. It benchmarked ~10% slower (the 4800u did, at least), consumed more power (25w max vs 15w max) and ran equally as hot as M1, but it did make me wonder - could AMD have made an M1-class chip if TSMC sold them the 5nm silicon they needed? It's hard to say, and arguably the Zen process wasn't (and still isn't) competitive with Apple's process enhancement.
Still though, AMD seems convinced that x86 can compete against modern RISC ISAs. They aren't far away from proving themselves right, honestly.
RISC-V is just an ISA (Instruction Set) that anyone can use, but what people use it in, and how they use it, is not specified and does not have to be open source. Apple could take RISC-V, plop it in their iPhone, and release it tomorrow in a processor that only boots Apple-signed code and requires proprietary firmware without any issue whatsoever. Intel could literally release a Core i5 with a RISC-V instruction set and an Intel ME built-in, no problem.
Where the hope mainly comes from is small chip developers like SiFive, who make many of their drivers and such open-source. But that's only if you buy from vendors like them - if you implement your own RISC-V core, there's no requirement that the drivers or firmware be open-source for it, in any way. You might say that's a missed opportunity. I say RISC-V wouldn't have caught on otherwise.