You don't need a common IL to abstract the CPU. You just have to more tightly connect the compilers with the shipped computer. Azul Vega did this with JVM bytecode (the Vega chips had an undocumented and sometimes changing ISA), but with GraalVM/Truffle technology you don't need a bytecode anymore. For example, GraalVM can JIT compile LLVM bitcode.
Non-portability of bitcode is hardly an issue. OK, fix sizeof(long) to 64 bits, no big deal. GraalVM/Truffle can JIT compile bitcode to the underlying ISA which can then evolve free from backwards compatibility constraints. You can also JIT compiled Python, Ruby, R, JavaScript, Rust, FORTRAN, etc, all with the open source code that exists today.
If I were designing a new computer architecture from scratch this is the way I'd go. If you don't need to freeze or even properly document your CPU ISA it gives you way more ability to quickly deploy performance upgrades, quickly iterate on CPU designs etc. You can have a custom OS that bundles GraalVM and QEMU, for the cases where you can't recompile apps.
Non-portability of bitcode is hardly an issue. OK, fix sizeof(long) to 64 bits, no big deal. GraalVM/Truffle can JIT compile bitcode to the underlying ISA which can then evolve free from backwards compatibility constraints. You can also JIT compiled Python, Ruby, R, JavaScript, Rust, FORTRAN, etc, all with the open source code that exists today.
If I were designing a new computer architecture from scratch this is the way I'd go. If you don't need to freeze or even properly document your CPU ISA it gives you way more ability to quickly deploy performance upgrades, quickly iterate on CPU designs etc. You can have a custom OS that bundles GraalVM and QEMU, for the cases where you can't recompile apps.