Emulation is when a CPU in instruction set A runs machine code in instruction set B.
A specification of a piece of hardware called a design and is written in a hardware design language (HDL). The most used HDLs are VHDL (mostly in Europe, I believe) and Verilog (mostly in the USA, I believe).
A design is just a set of source files which admit a complete description. To actually implement the design on a physical design, additional steps are needed. Specifically, the code needs to be mapped to the FPGA (this can be divided into a couple of steps: 'translate', 'map', and 'place and route'). This is a messy optimization problem which is typically approached with a stochastic algorithm, and usually takes quite long (think a couple of minutes for trivial designs, and up to 8 hours for complicated designs on big FPGAs).
To implement a 'silicon implementation' of a CPU, you also need a layout. I'm not 100% sure how these are done, but I would guess it's some mixture of automatic design, re-use of existing blocks, and manual design by greybeard electrical engineers. The design needs to satisfy some design rules, which are determined by the process that is used.
The advantage of having a dedicated layout over having a synthesizable design that you can run on an FPGA, is that it often clocks much faster. I have no idea how much faster though (I think at least 10x?), and I'd guess it depends on the design, process, FPGA, and how good the manual layout is.
A specification of a piece of hardware called a design and is written in a hardware design language (HDL). The most used HDLs are VHDL (mostly in Europe, I believe) and Verilog (mostly in the USA, I believe).
A design is just a set of source files which admit a complete description. To actually implement the design on a physical design, additional steps are needed. Specifically, the code needs to be mapped to the FPGA (this can be divided into a couple of steps: 'translate', 'map', and 'place and route'). This is a messy optimization problem which is typically approached with a stochastic algorithm, and usually takes quite long (think a couple of minutes for trivial designs, and up to 8 hours for complicated designs on big FPGAs).
To implement a 'silicon implementation' of a CPU, you also need a layout. I'm not 100% sure how these are done, but I would guess it's some mixture of automatic design, re-use of existing blocks, and manual design by greybeard electrical engineers. The design needs to satisfy some design rules, which are determined by the process that is used.
The advantage of having a dedicated layout over having a synthesizable design that you can run on an FPGA, is that it often clocks much faster. I have no idea how much faster though (I think at least 10x?), and I'd guess it depends on the design, process, FPGA, and how good the manual layout is.