Thanks for the link to the Vidor, unfortunate it wasn't more functional. It'll happen someday and when it does I'll be very excited, I know that there are already hybrid FPGA/microcontroller chips as an alternative to putting a softcore microcontroller on the FPGA itself (and wasting a lot more space and speed than needed).
I await the day when I can be like "nah, pin 2 will be a 16-bit 10MHz PWM output controlled by this register and pin 7 will be a frequency counter" and then access that with code on the microcontroller as if it was a built in peripheral.
I'm kind of skeptical I'll ever really get into FPGAs otherwise, my use case for them is always so simple, at the level of... well... PWM outputs and PID loops. But a microcontroller is fast enough for most PID loops so really to me the advantage is customizable function-pin mappings. I can't imagine trying to implement something like an ethernet stack on an FPGA though, although I guess you can run DOOM on one so maybe there will be a compiler from C++ to FPGA somehow that's not comically bad. ;-)
> I await the day when I can be like "nah, pin 2 will be a 16-bit 10MHz PWM output controlled by this register and pin 7 will be a frequency counter" and then access that with code on the microcontroller as if it was a built in peripheral.
Are you familiar with the Cypress PSoC line? They have that.
I do remember them coming out, I believe at the time ARM was unfamiliar to me so that half was too much to learn simultaneously and I was worried about being unable to meaningfully use it. They look more interesting now, thanks for the reminder.
I await the day when I can be like "nah, pin 2 will be a 16-bit 10MHz PWM output controlled by this register and pin 7 will be a frequency counter" and then access that with code on the microcontroller as if it was a built in peripheral.
I'm kind of skeptical I'll ever really get into FPGAs otherwise, my use case for them is always so simple, at the level of... well... PWM outputs and PID loops. But a microcontroller is fast enough for most PID loops so really to me the advantage is customizable function-pin mappings. I can't imagine trying to implement something like an ethernet stack on an FPGA though, although I guess you can run DOOM on one so maybe there will be a compiler from C++ to FPGA somehow that's not comically bad. ;-)