The instruction set architecture has no concept of it either, nor about instruction level parallelism, branch prediction or speculative execution. There is no way of getting this right other than knowing about how the processor is implemented under the hood and issue the right assembly based on that. Often experimentation is needed to get it right.
To fix this, the instruction set need to be changed, and this need to be kept in order to keep it compatible with earlier versions. Thus the instruction set remains as it is with the exception that new instruction may be added.
I'm always amazed that multi-thread code works as well as it does. I can have some data in multiple caches being used by multiple threads on separate CPUs and as long as I get the memory barriers right, it will work. Combine that with predictive branching and out-of-order execution and it feels even more magical.
So what C programmers have to engage in cargo culted patterns to try and trigger the correct behaviour from their optimising compiler.