> I suppose there is always a physical limit on the total capacity of low latency addressable ram and storage you can manage to shove into an architecture.

Some people even argue that, due to these physical limits, storage access time tends to scale O(sqrt(N)) with the size N of the storage, including for RAM.

http://www.ilikebigbits.com/blog/2014/4/21/the-myth-of-ram-p...