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From what I was able to gather, the onus is on the SBF for misappropriating FTX customers' funds. On the Alameda side it does not seem like a typical scam in the sense of "get money and run with it". "Just" a desperation out of illiquidity due to a credit crunch. Keep in mind that SBF was a 90% owner in Alameda anyway.

I am however positive she should have stayed out of crypto. Everybody in this space becomes at least morally gray at some critical point, even if they started well-intentioned.

But regardless of CE's intentions, you're posing a philosophical question: should we evaluate worldviews for what they are, or by who is possessing them. I lean towards the first one.


That’s a valid outlook and you’re free to do so, but we’ve seen enough scammers throughout history to know that simply having a good viewpoint does not mean much.

Remember that countless figures in the present day project great morals, progressive viewpoints, or socially conscious viewpoints, who turn out to be horrible people.

Even the Jeffrey Epsteins of the world project plenty of agreeable philosophies and worldviews.

Personally I am interested in a persons character, not that they speak about stuff I happen to agree with.

On the topic of Alameda, to pretend Caroline was not part of the scam loop is to remove her agency as a person who is at the head of an organization. She knowingly propagated this behavior, got rich off it, and continued it.


Internships? Yeah, nah. TSMC doesn't hand out technology NDAs to interns, which makes them kinda useless.

All in all, the IC design field is a decade or two behind software dev in terms of ergonomics. They're not going to attract a lot of talent, if the tooling remains as kludgy and unreliable as it is. What if GCC or Clang crashed on you once in a while "just because"? That's the reality of IC design flow.

On the flip side, the world at large has just realized the importance of chips, which makes the outlook mildly positive.


Hopefully, a move towards open hardware standards will help with that problem.

SiFive probably not as worried about interns and NDAs.


SiFive isn't a foundry I don't think, and the foundry process is heavily NDA encumbered.


Open standards means alternatives to clunky technology. I'm optimistic


I agree


+1 to IC being decades behind.

I think the average programmer would be horrified if they really knew the state of modern chip design. SWEs already know how bad most software is, but imagine an entire industry of tens of thousands of people writing code (HDL/TCL), who often don't even think what they do is programming, that has evolved over the last 50 years with minimal interaction with the rest of the software engineering world.

Verilog is a nightmare. The tools are buggy. Everyone has Stockholm syndrome. Version control is considered state-of-the-art and you're lucky if your org uses it.

I've seen a lot of HDL code in my career, and there's a huge number of well respected senior engineers who think having any form of hierarchy, abstraction, or even for-loops is very advanced design practice.

The only good part is the bar is so low it's easy to standout and climb. I think the industry is in a position where it would be surprisingly easy for a startup of seasoned SWEs with a decent understanding of how to write optimized hardware to churn out competitive chips with 10x the velocity of the big players like Nvidia/AMD/Intel


Rest assured that one of the companies you mentioned has deployed a catalog of reusable software components not long ago. It's already quite populated. But the funny thing is, you need VP approval to submit your modules.

I agree that EDA companies are unnecessarily siloed and dated in many places.

Weren't it for the moat of hundreds of PhD's working on the algorithms, it'd have been disrupted to hell by startups.


EDA software provides the infrastructure for projects with very high NRE and with low tolerance for failure (you can't just recompile and deploy a new chip design for free when you've already built a million bricks). Their entire business model is built around risk avoidance, so it would require an enormous improvement in efficiency for a client to take a risk on a "disrupting" startup's tools.


I used to work in EDA/Semi-IP as well. In addition to the common argument that tool changes are avoided to mitigate risk because of expensive iteration costs, another rationale is that the design and manufacturing costs of making a chip are so high that integrators are less fixated on switching tools for savings because they are not that significant to the overall budget.


Yes, BUT... Each new technology node (excluding shrinks) already disrupts the flow in many breaking ways. Seemingly small changes, new DRC requirements, the need to model more side effects all cooperate to make porting to a new node all but easy.


And you can't just upgrade the stack every 2 weeks during a 2 year project. There is a infamous example of this in the mechanical cad world with airbus and catia where they had to rebuild half a plane in a different version of cad


I actually looked into these.

There's a tradeoff between software skills and algorithmic skills. These guys are really really serious about algorithms, it figures their software isn't as good, none of that recent fancy shit, git at best. And it has to be PERFECT within its context, no fucking up or patching the fuckups with an if-else for that bug.


> Rest assured that one of the companies you mentioned has deployed a catalog of reusable software components not long ago. It's already quite populated. But the funny thing is, you need VP approval to submit your modules.

LoL this seems par for the course.


And the fact that billions of investment in making chips that work is at stake.

That's a really, really, REALLY wide moat.



++ COLLATE "C" is your friend, particularly if you find yourself using a GUID or other text-y PK field.


I wonder what will come of it. Portugal had Chipidea which was somewhat successful, to be later acquired by MIPS and sold shortly after to Synopsys.


Cadence and Synopsys use it.


It's very popular in high-end Unix workstation software, e.g. CST microwave studio, Bruker's MRI and NMR software, etc


Sadly, the "cocktail party test" part is so true. How am I supposed to be proud of my work between that and "this one asshole customer" from Japan? (Tier 1's from USA are demanding, but reasonable).

We are woefully underappreciated industry. While we're B2B vendors, it's no rent-seeking sales-driven crap. It's actual innovation 1-3 years ahead what's in consumers' hands.

However, I think it is slowly beginning to change - with news about "chip sovereignty" initiatives and AI helping design SoC's going mainstream. People now realize how crucial ICs are when car factories close.


Intel did offer foundry services, at least 3 years ago or so, albeit designing stuff for that node required putting everything in separated environment, and simulating in separate compute farms. Even TSMC which was and is far ahead does not demand this level of paranoia, only documentation is put in secure isolated environment, other stuff being managed in the more reasonable way of unix groups, which are, well, good enough.


Isn't the difference that Intel is actually protecting its chip IP, whereas TSMC just fabs other peoples' chips and isn't in the business themselves?


Just designing on their node as a foundry customer.


Do you realize that most locations where tech companies would seek talent have much better employee protection? No at-will employment, guaranteed annual and parental leave.


Why aren't such dense polynomials used more often?

Is it that we trade off something in return for less short-term correlation (maybe more long-term correlation)?


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