Hacker Newsnew | past | comments | ask | show | jobs | submit | exged's commentslogin

Just wondering, what makes NN-512 superior to Intel's oneAPI DNN library?


For example: try to find a deep learning framework that uses Intel's oneAPI DNN library and achieves 80% of the performance of this: https://nn-512.com/browse/DenseNet121

Tell me if you can find one


Almost everything has at least an 8-bit MCU now. 32-bit MCUs are also extremely common now, and even simple ones like the ARM Cortex-M0 are competitive with a 286/386 (albeit with less memory / no MMU).

A rather surprising number of devices run very powerful application processors. An amusing example is Apple's Lightning to HDMI adapter, which has an ARM SoC with 256MB of RAM and boots a Darwin kernel in order to decode a H.264 compressed video protocol. Depending on what exactly they put into it (wouldn't be surprised if they borrowed the Apple TV chip for a relatively low-volume product like this) it may be more powerful than a fairly recent computer.


The first time I saw that adapter and realized it was basically an external video card, not a pin breakout, very eye-opening.


Has anyone tried to run Linux on that Apple adapter?


Obligatory “can it run DOOM?”


Looks like this dev has patched the HW and has shell access https://twitter.com/nyan_satan/status/1322329047779713024?s=...


That’s delightful!

Anyone want to buy a few and make the first cluster of HDMI adapters?


Obligatory “can it run DOOM?”

Imagine a beowulf cluster of them.


Aside from very simple use cases, you'd probably struggle to render 800x480 or 1024x768 frames on an MCU. At 1024x768 especially, the pixel rate (47 MP/s at 60Hz) and framebuffer size (2.3MB at 24bpp) are just too big even for large MCUs.

APs are the right tool for the job. It's true that for hobbyists, documentation is lacking and DSI is complex to get started with. The best solution would probably extend DSI with something like EDID. DSI displays can then be plug-and-play (like HDMI / DP) using an universal driver.

Another option is eDP, but it's not so common on cheap APs or screens.


Ehh, not really. I've used both Macs (old 15" rMBP, 12" Macbook, M1 Macbook Air) and Thinkpads (T450s, X1C G7, T14 AMD) and Lenovo just frequently drops the ball on things like display, speakers, touchpad and battery life.

Apple has also made some poor decisions in various areas in the past like poor thermals, power-sucking dGPUs, and of course the butterfly keyboard. The M1 Macbook is very nearly perfect though, and I don't know how any of the PC vendors are going to top it.


Garbage trucks should be possible. They are heavy but no heavier than a semi truck, with a tiny fraction of the range (150 miles vs 500+). Plus, low speed city driving is much more efficient than highway driving with an EV drivetrain.


Do you have any thoughts on high torque repeated starts with a full load? This ain't city driving in a Prius. There's also a anti-rocket problem here in the vehicle is at its heaviest at it's highest battery depletion. Makes for some interesting problems.


Don't electric motors have their full torque at 0 rpm


I get that all else being equal, it's better to put everything in RAM, but what point is it just poor software design? 1TB of RAM is nothing to sneeze at. Is there really such a great need for sub-100us read latencies that commodity NVMe SSDs are insufficient?


The shortage is actually a direct outcome of Intel's problems. Historically Intel had by far the highest capacity for leading edge fabrication processes - just for their own CPU production. It didn't make sense for companies like TSMC to invest in additional fabs as long as Intel had the lead. AMD taking the lead and moving ~25% of x86 CPU production to TSMC is a huge shift.


It's not just some gold coins, it's also the matter of $12.7 million invested in his research endeavor. If you raised $12.7 million to start a company like Theranos you'd also be looking at a steep prison sentence for securities fraud.


I would be tried for fraud like Elizabeth Holmes is where evidence is presented. She is not currently in prison and has been living in a luxury apartment rather than a COVID dungeon like this man has been in for 5 years without trial.


I'm not sure you read the entire article. It's not simply being in contempt of the court for failing to provide information on the asset location, but for refusing to uphold the plea bargain in which he provides limited power of attorney to investigate the trust held in Belize. You can't in good faith claim you can't remember and also refuse to assist in any capacity.

He would be free if he provided the power of attorney.


So it basically all comes down to money.

If you believe his punishment is just you should believe in debtors' prisons.

If you don't believe in debtors' prisons, you should object to this.


Some other studies [1] have shown that N95 valved masks are as effective at filtering exhaled droplets as unvalved cotton masks, and considerably more effective than improvised things like bandannas and neck gaiters. It makes some sense - the valve lets a lot of droplets out, but the rest of the N95 mask is probably a far better filter than a cotton mask.

It doesn't contradict the claim in this article, but it's an interesting thing to ponder about the risk of the general public having seemingly all standardized on cotton masks.

[1] https://advances.sciencemag.org/content/6/36/eabd3083


Reticle limited on Samsung 8nm means plenty of room is available on TSMC 5nm.

Also, GDDR does not have appreciably higher latencies than DDR memory when measured in nanoseconds. It's just more expensive than DDR and much more limited in terms of capacity.

If Apple does go the "huge SoC" route I'd expect to see HBM2 memory with socketed DDR4 or DDR5. It'd provide the best of both worlds - extremely high bandwidth and low latency for a small portion (say 32-64GB) of the memory, and high capacity for the rest (say 1-2TB), all without compromising the unified memory concept.

This is not without precedent - recent Xeon Phis, for all their other shortcomings, have had a similar memory hierarchy.


Yeah but when discrete GPUs get to 5nm they will still be reticle limited. They're not going to stop getting bigger. If Apple maintains a process node advantage maybe they could do SoCs to compete with discrete graphics at the previous node but I think Nvidia will catch up.

I agree that a combination of HBM and DDR sounds pretty good for a unified memory architecture. Are you imagining it as just another layer in the cache hierarchy or something actively managed?


How is it a unified memory architecture if one part is faster than another? Sounds rather non-unified.


"Unified" in this case refers to the CPU and GPU having the same access to memory. This could still be true even if part of the memory is faster, as long as it's faster for both CPU and GPU.


Guidelines | FAQ | Lists | API | Security | Legal | Apply to YC | Contact

Search: