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Come to think of it, I believe I might have found a couple of "back doors" in Win 10. Shall I call my EU parliament representative now about trade sanctions against MS, or shall I wait till Monday? Decisions, decisions..


Buffer management is in kernel space, but that's about all that happens in kernel space GPU-wise. Indeed, most interesting things happen in user space.


I have a RK3399-based (same chip as in the PBP) chromebook -- ASUS Chromebook Flip CA101P -- as one of my daily rides. It has no issue playing 1080@60fps & 4K@30 youtubes (I cannot physically output more than 4K@30 to my TV). Its Chrome browser is among the fastest browser experiences I get in my daily routine (which includes linux and windows desktops). On top of it, that chromebook lasts 6-10h of productive usage on a single charge.

Of course, Google's ChromeOS level of polish is a far cry from most 'freely assembled' distros out there, but last time I checked, the ubuntu/debian images for the PBP were getting there in terms of working features and performance.


"Whenever a product m×n is divisible by p, then m or n must be divisible by p."

Actually it's the other way around:

'Whenever m or n are divisible by p, then their product m×n must be divisible by p.'

The opposite is not true, i.e. the statement is not reversible and still true. For instance:

6x4 = 24; 24 is divisible by 8, i.e. 24 mod 8 = 0, yet 6 mod 8 = 6, and 4 mod 8 = 4.

[ed] I've stepped into a cognition discontinuity, move along, nothing to see.


If p is a prime number, then the product m×n being divisible by p means that either m or n is divisible by p. In fact, this is how prime numbers are defined when generalized to generic integral domains.


Doh, my reading balked at the embedded add. Yes, p being a prime actually inverts the statement successfully. My bad.


8 is not prime


"M₆₇ is not a prime" was also a famous single-slide silent lightning talk.

https://en.wikipedia.org/wiki/Frank_Nelson_Cole


If Intel are stockpiling 10nm parts now (Q2) so they'd have something on the shelves for Q4 then I don't see how their 10nm facilities are in a good shape. Furthermore, when everybody in the industry uses the 'x% yield' metrics, and Intel is using phrases like 'improving at a faster rate than anticipated', etc, to communicate yields, that means their proper yield metrics are far from looking good.


Ha! If I only knew about 'Build Your Own Lisp' three months ago!

I needed a simple language as a vehicle for a compiler talk I'm preparing for this summer, so I hacked along an extremely reduced LISP (a 'Non-LISP', as I call it), whose C++ implementation from scratch came out at about 1K -- 1.2K LOC with the AST optimizations I meant to demonstrate for the talk. Self-contained code here -- no libs or (much) STL: https://github.com/blu/tinl

OP, thank you for sharing Tim Morgan's work -- it's a work of love!


> whose C++ implementation from scratch...

You're aware of clasp?

https://github.com/clasp-developers/clasp

Which builds (in part) on embeddable common lisp:

https://gitlab.com/embeddable-common-lisp/ecl

See around 20-30 minutes: https://youtu.be/8X69_42Mj-g


Nope, I'm seeing clasp for the first time -- Christian Schafmeister's talk was extremely nice to listen to!

I did come across some small LISP implementations at the early stages, but by that time I already had the AST builder done. Maybe because I didn't actively search for LISP implementations, as I didn't need a 'proper' LISP per se, more of a DSL for quickly writing ASTs of arbitrary complex computational expressions. Those ASTs were the final goal ; )


Props to the author for the objective article. Re CA53 throughput and latencies, no -- I don't have the tables, but I've done my fair share of tbl/tbx mesurements: https://www.cnx-software.com/2017/08/07/how-arm-nerfed-neon-...


Welcome to hn, we meet again!


Salut! I've finally decided to register for writing, after years of mute reading ; )


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