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Python RiscV Core
(
github.com/cjdrake
)
2 points
by
vortexfever
62 days ago
|
past
Python Logic Simulation Library
(
github.com/cjdrake
)
93 points
by
mediisoccuspupa
5 months ago
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6 comments
AES in 300 lines of SystemVerilog
(
github.com/cjdrake
)
2 points
by
cjdrake
on Feb 4, 2013
|
past
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